EGR 270 Grossmont College District Multiplexers Simulation Lab Report
Question Description
Introduction
In this lab, we will be using what we’ve learned about multiplexers to implement a basic linear function, f(x) = 4x+1, where x is a 2-bit binary number. Our design specifications state that we must design the circuit for this function using four 2-1 MUXs. How the heck are we going to do THAT!?
Procedure
Part 1 – Complete the Truth Table for the Linear Function
- Using the spreadsheet software of your choice (or hand-written is fine), construct the truth table for f(x) = 4x+1. Save your spreadsheet and include with your lab submission. Use the table below to help get you started:
| x1 | x0 | Decimal Equiv of x | Decimal Equiv of f | Binary Equiv of f |
| 0 | 0 | 0 | f = 4*0 + 1 = 1 | 01 |
| 0 | 1 | 1 | ||
| 1 | 0 | 2 | ||
| 1 | 1 | 3 |
Part 2 – Draw the Circuit in Multisim
- Since our design requirements state that we must use a bank of four 2-1 MUXs, we must first design circuitry for the 2-1 MUX. If needed, re-watch the video on how to draw the logic circuit for the 2-1 MUX, then draw it in Multisim.
- Once you have one 2-1 MUX, make three copies and determine what values should be connected to the data and select lines of each multiplexer in order to obtain the appropriate output.
- Simulate your circuit and save a copy of your schematic showing the verification for the input case x = 2.
Part 3 – Lab Report
- Download, scan or take pictures of simulated circuit and truth table
- Compile all images using the word processing program of your choice and submit via Canvas as lab5yourname.pdf. Thanks and let me know if you have any questions!
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